Inital rewrite of RHUB SSDT

Universal/rhub-methods/manual.md

@@ -1,60 +1,72 @@
 # Fixing USB: Manual
 
-* [Finding the ACPI path](#finding-the-acpi-path)
-* [Edits to the sample SSDT](#edits-to-the-sample-ssdt)
+* [Finding the ACPI table](#finding-the-acpi-table)
+* [Edits to the sample SSDT](#edits-to-the-ssdt)
 * [Compiling the SSDT](#compiling-the-ssdt)
 * [Wrapping up](#wrapping-up)
 
-## Finding the ACPI path
+## Finding the ACPI table
 
-Finding the ACPI pathing is quite easy actually, first open your decompiled DSDT you got from [Dumping the DSDT](/Manual/dump.md) and [Decompiling and Compiling](/Manual/compile.md) with either maciASL(if in macOS) or any other text editor if in Windows or Linux(VSCode has an [ACPI extension](https://marketplace.visualstudio.com/items?itemName=Thog.vscode-asl) that can also help).
+So unlike the previous SSDT creations, we're not going to be working with the DSDT, instead we're gonna be looking through the entire ACPI dump and trying to find the bad table. 
 
-Next, search for the `Device (RHUB)`
+So to get these tables:
 
-You should get something like the following show up:
+* Run DEBUG version of OpenCore with `SysReport` enables
+* **or** running [acpidump.exe](https://acpica.org/downloads/binary-tools) in Windows
+  * note that the files dumped will need to be renamed from `.dat` to `.aml`
+  
+  
+Once you've done that, you should have a full folder similar to the below:
 
-![](/images/Universal/rhub-md/rhub-path.png)
+![](/images/Universal/rhub-md/acpi-dump.png)
 
-From the above, we can see that the full ACPI pathing for RHUB is `PCI0.XHC.RHUB`. If it's not as clear you can search for what those device paths are for your system:
 
-* Finding the PCI path:
-  * Search `PNP0A08` (If multiple show up, use the first one)
-* Finding XHCI path
-  * Search for `XHC`, `XHCI` and `XHC1`, and yours is whichever shows up.
+As you can see, we've got a bunch of ACPI tables that we need to decompile first. To make things a bit simpler, we only need to decompile the SSDTs. The rest of the tables are unneeded.
 
-Now with the pathing, you can head here: [Edits to the sample SSDT](#edits-to-the-sample-ssdt)
-
-## Edits to the sample SSDT
-
-Now that we have our ACPI path, lets grab our SSDT and get to work:
-
-* [SSDT-RHUB.dsl](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/decompiled/SSDT-RHUB.dsl)
-
-By default, this uses `PCI0.XHC_.RHUB` for the pathing. you'll want to rename accordingly.
-
-Following the example from above, we'll be renaming it to `PCI0.XHC1.RHUB`:
-
-**Before**:
+To run a mass decompile:
 
 ```
-External (_SB_.PCI0.XHC_.RHUB, DeviceObj) <- Rename this
-
-Scope (_SB.PCI0.XHC_.RHUB) <- Rename this
+/path/to/iasl/ /path/to/SSDT-1 /path/to/SSDT-2 ...
 ```
 
-![](/images/Universal/rhub-md/ssdt-before.png)
+![](/images/Universal/rhub-md/iasl.png)
+
+And so on... Don't worry about any compiler warning's, we won't be recompiling most of those files.
+
+Once done, you should get something like the following:
+
+![](/images/Universal/rhub-md/acpi-dump-decompiled.png)
+
+Now comes the fun part: Finding our bad SSDT
+
+As per Intel's engineering sample SSDTs, the OEM table ID will generally start with `xh_` with some string after it(in Intel's example, they use `"xh_nccrb"`):
+
+![](/images/Universal/rhub-md/sample-driver.png)
+
+So we'll want to search for `xh_` inside the `DefinitionBlock` of the SSDTs, luckily they will **only** be in the SSDTs so makes searching far shorter. 
+
+For our example, we'll be using an Asus ROG MAXIMUS XII EXTREME as our example. For a quick search, we've found our SSDT with `xh_` is SSDT-6! Specifically `"xh_cmsd4"`
+ 
+![](/images/Universal/rhub-md/asus-stock.png)
+
+
+## Edits to the SSDT
+
+Now comes the fun part, writing our own custom SSDT. For this we'll first want to grab a modified copy of Intel's engineering SSDT:
+
+* [SSDT-XHCI.dsl](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/decompiled/SSDT-XHCI.dsl.zip)
+
+Now once you open it up, you should get the following:
+
+![]()
+
+
+
 
-Following the example pathing we found, the SSDT should look something like this:
 
-**After**:
 
-```
-External (_SB.PCI0.XHC1.RHUB, DeviceObj) <- Renamed
 
-Scope (_SB.PCI0.XHC1.RHUB) <- Renamed
-```
 
-![](/images/Universal/rhub-md/ssdt-after.png)
 
 ## Compiling the SSDT
 

Universal/rhub.md

@@ -5,7 +5,14 @@
 
 ## What this SSDT does
 
-So on 400 series motherboards, certain OEMs have broken the ACPI spec and this results in issues when booting into macOS. To fix this, we'll want to turn off the RHUB device and force macOS to manually rebuild the ports.
+So on 400 series motherboards, certain OEMs have broken the ACPI spec and this results in issues when booting into macOS. To fix this, we have a few ways to fix it:
+
+* Turn off the RHUB and force macOS to rebuild the port
+  * Quick and dirty, not recommended long term
+* Fix the bad ACPI table
+  * Proper fix
+
+Ideally, we'd want to always go #2 but we'll still go over how to to do both methods.
 
 The following platforms will require fixing:
 

extra-files/decompiled/SSDT-XHCI.dsl

@@ -0,0 +1,227 @@
+// Based off of leaked Intel Engineering SSDTs
+DefinitionBlock ("", "SSDT", 0x02, "DRTNIA", "xh_nccrb", 0x0)
+{
+    
+  // Declaring our RHUB device, this is what all USB ports will route through
+  // Don't forget to rename XHC_ to what your USB controller's called(ex. XHCI)
+
+  External(\_SB.PCI0.XHC_.RHUB, DeviceObj)
+
+  // Declaring our individual USB ports
+  // Don't forget to rename XHC_ to what your USB controller's called(ex. XHCI)
+
+  External(\_SB.PCI0.XHC_.RHUB.HS01, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS02, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS03, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS04, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS05, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS06, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS07, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS08, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS09, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS10, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS11, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS12, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS13, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.HS14, DeviceObj)
+  
+  External(\_SB.PCI0.XHC_.RHUB.SS01, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS02, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS03, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS04, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS05, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS06, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS07, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS08, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS09, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.SS10, DeviceObj)
+  
+  // USBR ports, used for Storage Redirection
+ 
+  External(\_SB.PCI0.XHC_.RHUB.USR1, DeviceObj)
+  External(\_SB.PCI0.XHC_.RHUB.USR2, DeviceObj)
+
+
+
+  Scope (\_SB.PCI0.XHC_.RHUB) {  // Verify XHC_ is the correct name
+
+    //
+    // Method for creating generic _PLD buffers
+    // _PLD contains lots of data, but for purpose of internal validation we care only about
+    // ports' visibility and pairing (this requires group position)
+    // so these are the only 2 configurable parameters (User Visible, Group Position)
+    //
+    Method(GPLD, 2, Serialized) {
+      Name(PCKG, Package() { Buffer(0x10) {} } )
+      CreateField(DerefOf(Index(PCKG,0)), 0, 7, REV)
+      Store(1,REV)
+      CreateField(DerefOf(Index(PCKG,0)), 64, 1, VISI)
+      Store(Arg0, VISI)
+      CreateField(DerefOf(Index(PCKG,0)), 87, 8, GPOS)
+      Store(Arg1, GPOS)
+
+
+      return (PCKG)
+    }//end GPLD
+
+    //
+    // Method for creating generic _UPC buffers
+    // Similar to _PLD, for internal testing we only care about 1 parameter (port connectable)
+    // Windows and Linux should correct the port-type themselves, and macOS will fix it via USB
+    // mapping in post install
+    //
+    Method(GUPC, 1, Serialized) {
+      Name(PCKG, Package(4) { 0, 0xFF, 0, 0 } )
+      Store(Arg0,Index(PCKG,0))
+
+
+      return (PCKG)
+    }//end GUPC
+
+
+  //
+  // Below you'll find all the USB port scopes, these are used for defining what type
+  // each is. Thankfully Windows will eat any garbage and still work fine, macOS is quite picky.
+  // And now you can see why we need to rewirte the OEM's SSDT.
+  // For us, we just want functional ports in macOS. So we won't be applying any special properties
+  // to these ports besides the basics.
+  //
+  Scope (HS01) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,1)) }
+  }
+
+  Scope (HS02) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,2)) }
+  }
+
+  Scope (HS03) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,3)) }
+  }
+
+  Scope (HS04) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,4)) }
+  }
+
+  Scope (HS05) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,5)) }
+  }
+
+  Scope (HS06) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,6)) }
+  }
+
+  Scope (HS07) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,7)) }
+  }
+
+  Scope (HS08) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,8)) }
+  }
+
+  Scope (HS09) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,9)) }
+  }
+
+  Scope (HS10) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,10)) }
+  }
+
+  Scope (HS11) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,11)) }
+  }
+
+  Scope (HS12) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,12)) }
+  }
+
+  Scope (HS13) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,13)) }
+  }
+
+  Scope (HS14) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,14)) }
+  }
+
+  //
+  // USBR Ports exist but aren't exposed to the end user directly
+  // This is why we set the ports to 0
+  //
+  Scope (USR1) {
+    Method(_UPC) { Return (GUPC(0)) }
+    Method(_PLD) { Return (GPLD(0,0)) }
+  }
+
+  Scope (USR2) {
+    Method(_UPC) { Return (GUPC(0)) }
+    Method(_PLD) { Return (GPLD(0,0)) }
+  }
+
+  // USB 3.0 personalities
+  Scope (SS01) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,1)) }
+  }
+
+  Scope (SS02) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,2)) }
+  }
+
+  Scope (SS03) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,3)) }
+  }
+
+  Scope (SS04) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,4)) }
+  }
+
+  Scope (SS05) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,5)) }
+  }
+
+  Scope (SS06) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,6)) }
+  }
+
+  Scope (SS07) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,7)) }
+  }
+
+  Scope (SS08) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,8)) }
+  }
+
+  Scope (SS09) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,9)) }
+  }
+
+  Scope (SS10) {
+    Method(_UPC) { Return (GUPC(1)) }
+    Method(_PLD) { Return (GPLD(1,10)) }
+  }
+
+
+  } //end scope RHUB
+
+}//end of SSDT-XHCI