diff --git a/Desktops/desktop-ec.md b/Desktops/desktop-ec.md index 3369324..5e1d444 100644 --- a/Desktops/desktop-ec.md +++ b/Desktops/desktop-ec.md @@ -10,7 +10,7 @@ To find out what EC you have, open your decompiled DSDT and search for `PNP0C09` As you can see our `PNP0C09` is found within the `Device (EC0)` meaning this is the device we want to hide from macOS(others may find `H_EC`, `ECDV`, etc, everyone's systems will be different). Now grab our SSDT-EC and uncomment the EC0 function(remove the `/*` and `*/` around it): * [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl) - * For Skylake+ and all AMD systems + * For Skylake and newer and all AMD systems * [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl) * For Broadwell and older @@ -35,36 +35,42 @@ External (_SB_.PCI0.LPCB.EC0, DeviceObj) */ <- REMOVE THIS ``` -But looking back at the screenshot above we notice something, our ACPI path is different: `PC00.LPC0` vs `PCI0.LPCB`. This is very important especially when you're dealing with Intel consumer vs Intel HEDT and AMD, `PC00.LPC0` is common on Intel HEDT while `PCI0.SBRG` is common on AMD. And they even come with name variation such as `EC0`, `H_EC`, `PGEC` and `ECDV`, so there can't be a one size fits all SSDT, **always verify your path and device. DO NOT ASSUME**. +But looking back at the screenshot above we notice something, our ACPI path is different: `PC00.LPC0` vs `PCI0.LPCB`. This is very important especially when you're dealing with Intel consumer vs Intel HEDT vs AMD, `PC00.LPC0` is common on Intel HEDT while `PCI0.SBRG` is common on AMD. And they even come with name variation such as `EC0`, `H_EC`, `PGEC` and `ECDV`, so there can't be a one size fits all SSDT, **always verify your path and device. DO NOT ASSUME**. * Finding the LowPinCount path: * Intel: Search `Name (_ADR, 0x001F0000)` * AMD: Search `Name (_ADR, 0x00140003)` * Finding the PCI path: - * Search for `PNP0A08` (If multiple show up, use the first one) + * Intel: Search `PNP0A08` (If multiple show up, use the first one) + * AMD: Assume `PCI0`(most AMD DSDTs don't declare the PCI path directly) -And make sure to scroll to the bottom as the new Fake EC function also need the correct path to replace the old EC. **Do not rename the EC device itself**, this is our fake EC we're using for macOS to play with so leave Leave `Device (EC)` alone. **Just change the path!** +And make sure to scroll to the bottom as the new Fake EC function also need the correct path to replace the old EC. **Do not rename `Device (EC)`**, this is our fake EC we're using for macOS to play with so leave `Device (EC)` alone. **Just change the path!** > What happens if multiple `PNP0C09` show up When this happens you need to figure out which is the main and which is not, it's fairly easy to figure out. Check each controller for the following properties: -* `_HID` -* `_CRS` -* `_GPE` +* `_HID` (Hardware ID) +* `_CRS` (Current Resource Settings) +* `_GPE` (General Purpose Events) > What happens if no `PNP0C09` show up? -This means your SSDT can be *almost* complied, the main thing to watch for is whether your DSDT uses `PCI0.LPCB` or not. The reason being is that we have a FakeEC at the bottom of our SSDT that needs to connect properly into our DSDT. Gernally AMD uses `SBRG` while Intel HEDT use `LPC0`, **verify which show up in your DSDT**. +So what this means: EC faking is not mandatory for booting, instead only **recommended for proper USB power**. -You can check by just searching for `Name (_ADR, 0x001F0000)`(this only works for Intel, AMD's controller is found at `Name (_ADR, 0x00140003)`). This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`.**Again, double check your device. DO NOT ASSUME**: +So how do I make an SSDT without an EC? Well we'll only create a Fake EC for macOS to play with, this allows for AppleBusPowerController to load and handle our USB properly. To make the actual SSDT, its *almost* plug and play as no uncommenting needed. The main thing that needs to be changed: + +* LowPinCount path +* PCI path + +We want to make sure the SSDT hooks into our DSDT correctly so we need to make sure the ACPI path is correct: * Finding the LowPinCount path: * Intel: Search `Name (_ADR, 0x001F0000)` - * AMD: Search `Name (_ADR, 0x00140003)`(Almost always will be called `SBRG`) + * AMD: Search `Name (_ADR, 0x00140003)` * Finding the PCI path: - * Search for `PNP0A08` (If multiple show up, use the first one) - + * Intel: Search `PNP0A08` (If multiple show up, use the first one) + * AMD: Assume `PCI0`(most AMD DSDTs don't declare the PCI path directly) ![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png) @@ -73,7 +79,7 @@ You can check by just searching for `Name (_ADR, 0x001F0000)`(this only works fo Once you find out, change `PCI0.LPCB` to your correct path: ```text -Scope (\_SB.PCI0.LPCB) +Scope (\_SB.PC00.LPC0) { Device (EC) { @@ -93,9 +99,8 @@ Scope (\_SB.PCI0.LPCB) } ``` +## Correcting USB Power > Hey what about USBX? Do I need to do anything? USBX is universal across all systems, it just creates a USBX device that forces USB power properties. This is crucial for fixing Mics, DACs, Webcams, Bluetooth Dongles and other high power draw devices. This is not mandatory to boot but should be added in post-install if not before. Note that USBX is only used on skylake+ systems, Broadwell and older can ignore and that USBX requires a patched EC to function correctly - -For those who want a deeper dive into the EC issue: [What's new in macOS Catalina](https://www.reddit.com/r/hackintosh/comments/den28t/whats_new_in_macos_catalina/) diff --git a/Universal/awac.md b/Universal/awac.md index 326060d..32abc48 100644 --- a/Universal/awac.md +++ b/Universal/awac.md @@ -2,20 +2,33 @@ **For Intel 300 series chipsets only** -What the [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will do is force enable the Legacy RTC device in macOS, the reason we want to do this is that macOS currently does not support AWAC as a system clock. In some rare cases, there is no Legacy RTC device to force enable so we'll need to create a fake RTC device for macOS to play with using [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) +So on newer Intel 300 series motherboards, manufactueres started pushing for a new type of system clock: **AWAC**( **A** **W**eird **A**ss **C**lock). One small problem, macOS doesn't know what the hell an AWAC clock is instead only familiar with the legacy **RTC**(**R**eal **T**ime **C**lock). So we need to figure out how to bring back the old clock, thats where `SSDT-AWAC` and `SSDT-RTC0` come in: + +* [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) + * Disables AWAC and enables RTC + * In your DSDT, there's a varaible called `STAS` used for holding either a `One` or `Zero` to determine which clock to use(`One` for RTC and `Zero` for AWAC) + +* [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) + * Used for creating a fake RTC device for macOS to play with + * In very rare circumstances, some DSDTs may not have a legacy RTC to fall back on. When this happens, we'll want to create a fake device to make macOS happy + + +Note: AWAC actually stands for ACPI Wake Alarm Counter/Clock for those curious, though I'll forever know it as A Weird Ass Clock ;p + +## Determining which SSDT you need To determine whether you need [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) or [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl): * open your decompiled DSDT and search for `Device (AWAC)` -* If nothing shows then no need to continue and no need for this SSDT. +* If nothing shows then no need to continue and no need for this SSDT as you have now AWAC. Otherwise, continue on! * If you get a result then you have an `AWAC` system clock present, then continue with the next search for `STAS ==`: ![](https://i.imgur.com/uuUF857.png) As you can see we found the `STAS ==` in our DSDT, this means we're able to force enable our Legacy RTC. In this case, [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will be used As-Is with no modifications required. Just need to compile. -For systems where no `STAS` shows up **but** you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check whether your DSDT uses `LPCB`, `LBC` or `LBC0`. +For systems where no `STAS` shows up **but** you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check thwe naming of LPC in your DSDT -By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses: +By default the SSDT uses `LPCB`, you can check what your system uses by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`: -![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png) +![](https://cdn.discordapp.com/attachments/456913818467958789/675169950108876852/Screen_Shot_2020-02-06_at_7.43.24_PM.png) diff --git a/Universal/nvram.md b/Universal/nvram.md index 29d313f..d21e199 100644 --- a/Universal/nvram.md +++ b/Universal/nvram.md @@ -2,6 +2,11 @@ This SSDT is required for all B360, B365, H310, H370, Z390 motherboards, it specifically brings back NVRAM support and requires very little configuration for the end user. -By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses: +By default it uses `PCI0.LPCB` for the PCI and LowPinCount path. The device names can vary between `PC00` and `PCI0` for PCI path and `LPCB`, `LBC` and `LBC0` for LowPinCount path. To see what you have: + +* Finding the LowPinCount path: + * Intel: Search `Name (_ADR, 0x001F0000)` +* Finding the PCI path: + * Intel: Search `PNP0A08` (If multiple show up, use the first one) ![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png)