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Rewrite prebuilt SSDT page

Browse Source 
Should help new users navigate the site better

Also added X99 and X299 info
This commit is contained in:
Mykola Grymalyuk
2020-10-16 15:07:15 -06:00
parent 0a579cb98a
commit 614c097101
30 changed files with 1708 additions and 131 deletions
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11
.vuepress/config.js
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@@ -207,6 +207,7 @@ module.exports = {
['/Universal/awac-methods/prebuilt', 'Prebuilt'], ['/Universal/awac-methods/prebuilt', 'Prebuilt'],
['/Universal/awac-methods/ssdttime', 'SSDTTime'], ['/Universal/awac-methods/ssdttime', 'SSDTTime'],
['/Universal/awac-methods/manual', 'Manual'], ['/Universal/awac-methods/manual', 'Manual'],
['/Universal/awac-methods/manual-hedt', 'Manual-HEDT'],
] ]
}, },
['/Universal/nvram', 'NVRAM PMC'], ['/Universal/nvram', 'NVRAM PMC'],
@@ -240,6 +241,16 @@ module.exports = {
['/Universal/imei-methods/manual', 'Manual'], ['/Universal/imei-methods/manual', 'Manual'],
] ]
}, },
['/Universal/unc0', 'Fixing Uncore Bridge'],
{
title: 'Methods',
collapsable: true,
sidebarDepth: 2,
children: [
['/Universal/unc0-methods/prebuilt', 'Prebuilt'],
['/Universal/unc0-methods/manual', 'Manual'],
]
},
['/Universal/smbus', 'Fixing SMBus Support'], ['/Universal/smbus', 'Fixing SMBus Support'],
{ {
title: 'Methods', title: 'Methods',

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Universal/awac-methods/manual-hedt.md Normal file
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@@ -0,0 +1,110 @@
# Fixing System Clocks on HEDT: Manual
* [Finding the ACPI path](#finding-the-acpi-path)
* [Edits to the sample SSDT](#edits-to-the-sample-ssdt)
* [Compiling the SSDT](#compiling-the-ssdt)
* [Wrapping up](#wrapping-up)
## Seeing if you need SSDT-RTC0-RANGE
To start, first open your decompiled DSDT you got from [Dumping the DSDT](/Manual/dump.md) and [Decompiling and Compiling](/Manual/compile.md) with either maciASL(if in macOS) or any other text editor if in Windows or Linux(VSCode has an [ACPI extension](https://marketplace.visualstudio.com/items?itemName=Thog.vscode-asl) that can also help).
Now search for `PNP0B00` and look at the `_CRS` entry within it:
![](../../images/Universal/awac-md/rtc-range-check.png)
And from the above example, we see we have 2 banks of RTC memory:
* Bank 1: starts at 0x70 and is length 0x2
* Bank 2: starts at 0x74 and is length 0x4
Now the problem is that the OEM forgot to mat sections 0x72 and 0x73. Because of this, macOS may halt while booting(prominently in Big Sur)
And finally, verify if it has an _STA method as well. This will be used shortly
## Finding the ACPI path
Finding the ACPI pathing is quite easy actually, first open your decompiled DSDT you got from [Dumping the DSDT](/Manual/dump.md) and [Decompiling and Compiling](/Manual/compile.md) with either maciASL(if in macOS) or any other text editor if in Windows or Linux(VSCode has an [ACPI extension](https://marketplace.visualstudio.com/items?itemName=Thog.vscode-asl) that can also help).
To start, search for the following:
* Finding the RTC name:
* Search `PNP0B00`
* Finding the LowPinCount path:
* Search `Name (_ADR, 0x001F0000)`
* Finding the PCI path:
* Search `PNP0A08` (If multiple show up, use the first one)
You should get something like the following show up:
RTC Pathing | LPC Pathing | PCI Pathing
:----------:|:-------------------------:|:-------------------------:
![](../../images/Universal/awac-md/rtc-name.png) | ![](../../images/Universal/nvram-md/lpc.png) | ![](../../images/Universal/nvram-md/pci0.png)
From the above, we can see we have `RTC`, `LPC0` and `PCI0`. Now we can head to the next stage
## Edits to the sample SSDT
Now that we have our ACPI path, lets grab our SSDT and get to work:
* [SSDT-RTC0-RANGE.dsl](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0-RANGE.dsl)
By default, this uses `PC00.LPC0.RTC` for the pathing. you'll want to rename accordingly.
Following the example from above, we'll be renaming it to `PCI0.LPC0.RTC`:
**Before**:
```
External (_SB_.PC00.LPC0, DeviceObj) <- Rename this
External (_SB_.PC00.LPC0.RTC_, DeviceObj) <- Rename this
Scope (_SB.PC00.LPC0) <- Rename this
```
![](../../images/Universal/awac-md/ssdt-before-rename-hedt.png)
Following the example pathing we found, the SSDT should look something like this:
**After**:
```
External (_SB_.PCI0.LPC0, DeviceObj) <- Renamed
Scope (_SB.PCI0.LPC0.RTC) <- Renamed
Scope (_SB.PCI0.LPC0) <- Renamed
/* <- Remove if your RTC device didn't have an _STA
Scope (RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
*/ <- Remove if your RTC device didn't have an _STA
```
![](../../images/Universal/awac-md/ssdt-after-rename-hedt.png)
### Compiling the SSDT
With the SSDT done, you're now [ready to compile the SSDT!](/Manual/compile.md)
## Wrapping up
Once you're done making your SSDT, either head to the next page to finish the rest of the SSDTs or head here if you're ready to wrap up:
* [**Cleanup**](/cleanup.md)

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Universal/awac-methods/manual.md
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@@ -9,6 +9,8 @@
## Determining which SSDT you need ## Determining which SSDT you need
* **Note**: X99 and X299 see [here](../awac-methods/manual-hedt.md)
Finding which SSDT you need is quite easy actually, first open your decompiled DSDT you got from [Dumping the DSDT](/Manual/dump.md) and [Decompiling and Compiling](/Manual/compile.md) with either maciASL(if in macOS) or any other text editor if in Windows or Linux(VSCode has an [ACPI extension](https://marketplace.visualstudio.com/items?itemName=Thog.vscode-asl) that can also help). Finding which SSDT you need is quite easy actually, first open your decompiled DSDT you got from [Dumping the DSDT](/Manual/dump.md) and [Decompiling and Compiling](/Manual/compile.md) with either maciASL(if in macOS) or any other text editor if in Windows or Linux(VSCode has an [ACPI extension](https://marketplace.visualstudio.com/items?itemName=Thog.vscode-asl) that can also help).
Next search for `ACPI000E`. You should get something similar: Next search for `ACPI000E`. You should get something similar:
@@ -32,25 +34,6 @@ Now it's as simple as grabbing [SSDT-AWAC.dsl](https://github.com/acidanthera/Op
* [SSDT-AWAC.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml) * [SSDT-AWAC.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
### _INI Edge Cases
Mainly seen on X299 refresh boards, there's already a `Scope (_SB) { Method (_INI...` in your DSDT. This means our SSDT-AWAC will conflict with the one found in our DSDT. For these situations, you'll want to remove `Method (_INI, 0, NotSerialized) {}` from the SSDT. You'll be left this this in the end:
```
DefinitionBlock ("", "SSDT", 2, "DRTNIA", "AWAC", 0x00000000)
{
External (STAS, IntObj)
Scope (_SB)
{
If (_OSI ("Darwin"))
{
STAS = One
}
}
}
```
## RTC0 Method ## RTC0 Method
This method is for those who either don't have a `PNP0B00` device to re-enable or have no easy way(via STAS variable). This method is for those who either don't have a `PNP0B00` device to re-enable or have no easy way(via STAS variable).

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@@ -3,10 +3,15 @@
By far the easiest method, all you need to do is download the following file: By far the easiest method, all you need to do is download the following file:
* [SSDT-AWAC.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml) * [SSDT-AWAC.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
* For most users
* [SSDT-RTC0-RANGE-HEDT](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RTC0-RANGE-HEDT.aml)
* For Intel's X99 and X299 platforms
Main things to note with this method: Main things to note with this method:
* Assumes you both have an AWAC clock and it can be easily turned off with the RTC replacing it, **this may not always work** * Assumes you both have an AWAC clock and it can be easily turned off with the RTC replacing it, **this may not always work**
* This only applies to SSDT-AWAC
* SSDT-RTC0-RANGE instead relies on known RTC names, and can only handle so many edge cases
* Doesn't really teach you anything * Doesn't really teach you anything
* For most, this doesn't matter. But to some knowing what makes your hackintosh tick is part of the journey * For most, this doesn't matter. But to some knowing what makes your hackintosh tick is part of the journey

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Universal/awac-methods/ssdttime.md
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@@ -1,5 +1,7 @@
# Fixing System Clocks (SSDT-AWAC/RTC0) # Fixing System Clocks (SSDT-AWAC/RTC0)
* **Reminder**: Does not support HEDT(ie. X99 and X299)
The second involves using SSDTTime which automates most of the process. See here on how to use it: [SSDTs: Easy Way](/ssdt-methods/ssdt-easy.md) The second involves using SSDTTime which automates most of the process. See here on how to use it: [SSDTs: Easy Way](/ssdt-methods/ssdt-easy.md)
To get the SSDT-PMC, run the following: To get the SSDT-PMC, run the following:

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Universal/awac.md
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@@ -17,7 +17,8 @@ The purpose of SSDT-AWAC/RTC0 is to fix the system clocks found on newer hardwar
* Z490 * Z490
* 400 series (Comet Lake, including Z490) * 400 series (Comet Lake, including Z490)
* 495 series (Icelake) * 495 series (Icelake)
* X299X (10th Gen refresh, AsRock and Asus don't use the -x naming so you'll need to double check) * X99
* X299
SSDT-AWAC tries to re-enable the old RTC clock that is compatible with macOS, while SSDT-RTC0 will instead create a "fake" RTC clock if there is no legacy one to enable. SSDT-AWAC tries to re-enable the old RTC clock that is compatible with macOS, while SSDT-RTC0 will instead create a "fake" RTC clock if there is no legacy one to enable.
@@ -27,4 +28,8 @@ For the RTC fix, there are 3 methods you can choose from:
* [Prebuilt](/Universal/awac-methods/prebuilt.md) * [Prebuilt](/Universal/awac-methods/prebuilt.md)
* [SSDTTime](/Universal/awac-methods/ssdttime.md) * [SSDTTime](/Universal/awac-methods/ssdttime.md)
* **Does not support HEDT**
* [Manual](/Universal/awac-methods/manual.md) * [Manual](/Universal/awac-methods/manual.md)
* For most users
* [Manual-HEDT](/Universal/awac-methods/manual-hedt.md)
* For X99 and X299 users

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@@ -25,8 +25,5 @@ So TL;DR:
For the EC fix, there are 3 methods you can choose from: For the EC fix, there are 3 methods you can choose from:
* [Prebuilt](/Universal/ec-methods/prebuilt.md) * [Prebuilt](/Universal/ec-methods/prebuilt.md)
* The prebuilt for desktops are very bloated. It's recommended to use the two methods below.
* The Laptop prebuilts are easily usable.
* [SSDTTime](/Universal/ec-methods/ssdttime.md) * [SSDTTime](/Universal/ec-methods/ssdttime.md)
* [Manual](/Universal/ec-methods/manual.md) * [Manual](/Universal/ec-methods/manual.md)

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@@ -14,8 +14,6 @@ This will provide you with some files, the main one you care about is SSDT-EC.**
The main things to note with this method: The main things to note with this method:
* Doesn't work on HEDT and server hardware(ie. X99 and X299)
* While the majority following this guide are likely on consumer hardware, those with fancier hardware will need to either use the [Prebuilt](#prebuilts) or [Manual](#manual) method
* Doesn't provide you the USBX property to fix power * Doesn't provide you the USBX property to fix power
* This can easily be fixed by using this prebuilt file in addition to SSDT-EC: [SSDT-USBX.aml](https://github.com/dortania/OpenCore-Post-Install/blob/master/extra-files/SSDT-USBX.aml) * This can easily be fixed by using this prebuilt file in addition to SSDT-EC: [SSDT-USBX.aml](https://github.com/dortania/OpenCore-Post-Install/blob/master/extra-files/SSDT-USBX.aml)
* Note USBX is only needed for Skylake and newer * Note USBX is only needed for Skylake and newer

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@@ -10,8 +10,6 @@ This will provide you with some files, the main one you care about is SSDT-PLUG.
The main things to note with this method: The main things to note with this method:
* Doesn't work on HEDT and server hardware(ie. X99 and X299)
* While the majority following this guide are likely on consumer hardware, those with fancier hardware will need to either use the [Prebuilt](#prebuilts) or [Manual](#manual) method
* Doesn't really teach you anything * Doesn't really teach you anything
* For most, this doesn't matter. But to some knowing what makes your hackintosh tick is part of the journey * For most, this doesn't matter. But to some knowing what makes your hackintosh tick is part of the journey

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Universal/plug.md
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@@ -10,6 +10,8 @@ The purpose of SSDT-PLUG is to allow the kernel's XCPM(XNU's CPU Power Managemen
**Note**: SSDT-PLUG is only compatible with Intel's Haswell and newer CPUs, Sandy Bridge and Ivy Bridge will need to follow the [ssdtPRgen method](https://dortania.github.io/OpenCore-Post-Install/universal/pm.html#sandy-and-ivy-bridge-power-management)(in post-install) while AMD users should not use this(unless attempting to attach AGPM which is outside the scope of Dortania's guides) **Note**: SSDT-PLUG is only compatible with Intel's Haswell and newer CPUs, Sandy Bridge and Ivy Bridge will need to follow the [ssdtPRgen method](https://dortania.github.io/OpenCore-Post-Install/universal/pm.html#sandy-and-ivy-bridge-power-management)(in post-install) while AMD users should not use this(unless attempting to attach AGPM which is outside the scope of Dortania's guides)
* Ivy Bridge-E(HEDT/server) however is supported by XCPM
## Methods to make this SSDT ## Methods to make this SSDT
For SSDT-PLUG, there are 3 methods you can choose from: For SSDT-PLUG, there are 3 methods you can choose from:

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# Fixing RHUB: SSDTTime
The second involves using SSDTTime which automates most of the process. See here on how to use it: [SSDTs: Easy Way](/ssdt-methods/ssdt-easy.md)
To get the SSDT-RHUB, run the following:
* `7. Dump DSDT` then run `7. USB Reset`
This will provide you with some files, the main one you care about is SSDT-USB-Rest.**aml**(Same file as SSDT-RHUB). The DSDT and .dsl are only left for referencing or verification.
The main things to note with this method:
* Doesn't really teach you anything
* For most, this doesn't matter. But to some knowing what makes your hackintosh tick is part of the journey
## Wrapping up
Once you're done making your SSDT, either head to the next page to finish the rest of the SSDTs or head here if you're ready to wrap up:
* [**Cleanup**](/cleanup.md)

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@@ -14,7 +14,8 @@ The following platforms will require fixing:
## Methods to make this SSDT ## Methods to make this SSDT
For the RHUB fix, there are 2 methods you can choose from: For the RHUB fix, there are 3 methods you can choose from:
* [Prebuilt](/Universal/rhub-methods/prebuilt.md) * [Prebuilt](/Universal/rhub-methods/prebuilt.md)
* [SSDTTime](/Universal/plug-methods/ssdttime.md)
* [Manual](/Universal/rhub-methods/manual.md) * [Manual](/Universal/rhub-methods/manual.md)

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# Fixing Uncore Bridges: Manual
* [Finding the ACPI path](#finding-the-acpi-path)
* [Edits to the sample SSDT](#edits-to-the-sample-ssdt)
* [Compiling the SSDT](#compiling-the-ssdt)
* [Wrapping up](#wrapping-up)
## Download the SSDT
Super simple, just grab the SSDT and compile:
* [SSDT-UNC0.dsl](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-UNC0.dsl)
See here how to compile: [Compiling ACPI](/Manual/compile.md)
## Wrapping up
Once you're done making your SSDT, either head to the next page to finish the rest of the SSDTs or head here if you're ready to wrap up:
* [**Cleanup**](/cleanup.md)

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@@ -0,0 +1,11 @@
# Fixing Uncore Bridges: Prebuilt
By far the easiest method, all you need to do is download the following file:
* [SSDT-UNC0.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-UNC0.aml)
## Wrapping up
Once you're done making your SSDT, either head to the next page to finish the rest of the SSDTs or head here if you're ready to wrap up:
* [**Cleanup**](/cleanup.md)

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@@ -0,0 +1,20 @@
# Fixing Uncore Bridges (SSDT-UNC0)
* [What this SSDT does](#what-this-ssdt-does)
* [Methods to make this SSDT](#methods-to-make-this-ssdt)
## What this SSDT does
This SSDT is required for all X99 and many X79 boards, it specifically disables unused devices in ACPI ensuing IOPCIFamily doesn't kernel panic. This requires very little configuration for the end user.
* X79
* C602
* X99
* C612
## Methods to make this SSDT
The main ways to make this SSDT:
* [Prebuilt](/Universal/unc0-methods/prebuilt.md)
* [Manual](/Universal/unc0-methods/manual.md)

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/* Purpose of this SSDT is to:
*
* - Find the RTC device and see if there's an _STA
* - If yes, just create a new RTC device as we'll assume AWAC is present
* and enabled by default. Thankfully AppleSMCRTC will unload with AWAC
* allowing AppleRTC to be the only kext loaded
* - If no, disable the RTC device and create a new one to avoid conflict
* with multiple RTC devices enabled
*
* Note this is only to be used with X99 and X299, X79 only support 1 bank
* of RTC memory and so this SSDT can actually break a system
*
* Also due to ACPI namespace issues, each RTC device has a unique name,
* thankfully AppleRTC matches based off of _HID and does not care about
* the RTC's name
*/
DefinitionBlock ("", "SSDT", 2, "DRTNIA", "RtcRange", 0x00001000)
{
// X99 Definitions
External (_SB_.PCI0, DeviceObj)
External (_SB_.PCI0.LPC0.RTC, DeviceObj)
External (_SB_.PCI0.LPC0.RTC._STA, MethodObj)
External (_SB_.PCI0.LPC0.RTC0, DeviceObj)
External (_SB_.PCI0.LPC0.RTC0._STA, MethodObj)
External (_SB_.PCI0.LPC.RTC, DeviceObj)
External (_SB_.PCI0.LPC.RTC._STA, MethodObj)
External (_SB_.PCI0.LPC.RTC0, DeviceObj)
External (_SB_.PCI0.LPC.RTC0._STA, MethodObj)
External (_SB_.PCI0.LPCB.RTC, DeviceObj)
External (_SB_.PCI0.LPCB.RTC._STA, MethodObj)
External (_SB_.PCI0.LPCB.RTC0, DeviceObj)
External (_SB_.PCI0.LPCB.RTC0._STA, MethodObj)
External (_SB_.PCI0.SBRG.RTC, DeviceObj)
External (_SB_.PCI0.SBRG.RTC._STA, MethodObj)
External (_SB_.PCI0.SBRG.RTC0, DeviceObj)
External (_SB_.PCI0.SBRG.RTC0._STA, MethodObj)
// X299 Definitions
External (_SB_.PC00, DeviceObj)
External (_SB_.PC00.LPC0.RTC, DeviceObj)
External (_SB_.PC00.LPC0.RTC._STA, MethodObj)
External (_SB_.PC00.LPC0.RTC0, DeviceObj)
External (_SB_.PC00.LPC0.RTC0._STA, MethodObj)
External (_SB_.PC00.LPC.RTC, DeviceObj)
External (_SB_.PC00.LPC.RTC._STA, MethodObj)
External (_SB_.PC00.LPC.RTC0, DeviceObj)
External (_SB_.PC00.LPC.RTC0._STA, MethodObj)
External (_SB_.PC00.LPCB.RTC, DeviceObj)
External (_SB_.PC00.LPCB.RTC._STA, MethodObj)
External (_SB_.PC00.LPCB.RTC0, DeviceObj)
External (_SB_.PC00.LPCB.RTC0._STA, MethodObj)
// LPC0 Naming
// X99 - RTC_ Case
If (CondRefOf (\_SB.PCI0.LPC0.RTC))
{
// Create RTC1 device
Device (\_SB.PCI0.LPC0.RTC1)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPC0.RTC._STA))
{
Scope (\_SB.PCI0.LPC0.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X99 - RTC0 Case
If (CondRefOf (\_SB.PCI0.LPC0.RTC0))
{
// Create RTC2 device
Device (\_SB.PCI0.LPC0.RTC2)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPC0.RTC0._STA))
{
Scope (\_SB.PCI0.LPC0.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// LPC Naming
If (CondRefOf (\_SB.PCI0.LPC.RTC))
{
// Create RTC1 device
Device (\_SB.PCI0.LPC.RTC1)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPC.RTC._STA))
{
Scope (\_SB.PCI0.LPC.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X99 - RTC0 Case
If (CondRefOf (\_SB.PCI0.LPC.RTC0))
{
// Create RTC2 device
Device (\_SB.PCI0.LPC.RTC2)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPC.RTC0._STA))
{
Scope (\_SB.PCI0.LPC.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// LPCB Naming
If (CondRefOf (\_SB.PCI0.LPCB.RTC))
{
// Create RTC1 device
Device (\_SB.PCI0.LPCB.RTC1)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPCB.RTC._STA))
{
Scope (\_SB.PCI0.LPCB.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X99 - RTC0 Case
If (CondRefOf (\_SB.PCI0.LPCB.RTC0))
{
// Create RTC2 device
Device (\_SB.PCI0.LPCB.RTC2)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.LPCB.RTC0._STA))
{
Scope (\_SB.PCI0.LPCB.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// SBRG Naming
If (CondRefOf (\_SB.PCI0.SBRG.RTC))
{
// Create RTC1 device
Device (\_SB.PCI0.SBRG.RTC1)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.SBRG.RTC._STA))
{
Scope (\_SB.PCI0.SBRG.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X99 - RTC0 Case
If (CondRefOf (\_SB.PCI0.SBRG.RTC0))
{
// Create RTC2 device
Device (\_SB.PCI0.SBRG.RTC2)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PCI0.SBRG.RTC0._STA))
{
Scope (\_SB.PCI0.SBRG.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// LPC0 Naming
// X299 - RTC_ Case
If (CondRefOf (\_SB.PC00.LPC0.RTC))
{
// Create RTC3 device
Device (\_SB.PC00.LPC0.RTC3)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPC0.RTC._STA))
{
Scope (\_SB.PC00.LPC0.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X299 - RTC0 Case
If (CondRefOf (\_SB.PC00.LPC0.RTC0))
{
// Create RTC4 device
Device (\_SB.PC00.LPC0.RTC4)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPC0.RTC0._STA))
{
Scope (\_SB.PC00.LPC0.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// LPC Naming
// X299 - RTC_ Case
If (CondRefOf (\_SB.PC00.LPC.RTC))
{
// Create RTC3 device
Device (\_SB.PC00.LPC.RTC3)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPC.RTC._STA))
{
Scope (\_SB.PC00.LPC.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X299 - RTC0 Case
If (CondRefOf (\_SB.PC00.LPC.RTC0))
{
// Create RTC4 device
Device (\_SB.PC00.LPC.RTC4)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPC.RTC0._STA))
{
Scope (\_SB.PC00.LPC.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// LPCB Naming
// X299 - RTC_ Case
If (CondRefOf (\_SB.PC00.LPCB.RTC))
{
// Create RTC3 device
Device (\_SB.PC00.LPCB.RTC3)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPCB.RTC._STA))
{
Scope (\_SB.PC00.LPCB.RTC)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
// X299 - RTC0 Case
If (CondRefOf (\_SB.PC00.LPCB.RTC0))
{
// Create RTC4 device
Device (\_SB.PC00.LPCB.RTC4)
{
Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum 1
0x0070, // Range Maximum 1
0x01, // Alignment 1
0x04, // Length 1 (Expanded to include 0x72 and 0x73)
)
IO (Decode16,
0x0074, // Range Minimum 2
0x0074, // Range Maximum 2
0x01, // Alignment 2
0x04, // Length 2
)
IRQNoFlags ()
{8}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
If (!CondRefOf (\_SB.PC00.LPCB.RTC0._STA))
{
Scope (\_SB.PC00.LPCB.RTC0)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Darwin"))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
}
}
}
}

19
extra-files/decompiled/SSDT-UNC.dsl Normal file
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@@ -0,0 +1,19 @@
/*
* Ensures unsed uncore bridges are disabled, otherwise X79 and X99
* will kernel panic in Big Sur with IOPCIFamily.
* SSDT Taken from OpenCorePkg repo
*/
DefinitionBlock ("", "SSDT", 2, "DRTNIA", "UNC", 0x00000000)
{
External (_SB.UNC0, DeviceObj)
External (PRBM, IntObj)
Scope (_SB.UNC0)
{
Method (_INI, 0, NotSerialized)
{
PRBM = 0
}
}
}

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8
ssdt-methods/ssdt-easy.md
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@@ -12,10 +12,10 @@ What this tool does is, it dumps your DSDT from your firmware, and then creates
* Need to be configured to your system * Need to be configured to your system
* **USBX SSDT**: * **USBX SSDT**:
* This is included on sample SSDTs but SSDTTime only makes the SSDT-EC part, Skylake and newer users can grab a pre-built here: [SSDT-USBX.aml](https://github.com/dortania/OpenCore-Post-Install/blob/master/extra-files/SSDT-USBX.aml) * This is included on sample SSDTs but SSDTTime only makes the SSDT-EC part, Skylake and newer users can grab a pre-built here: [SSDT-USBX.aml](https://github.com/dortania/OpenCore-Post-Install/blob/master/extra-files/SSDT-USBX.aml)
* **RHUB SSDT**:
* If you have a 10th gen CPU, you'll need to either use the prebuilt or manually create it.
* **IMEI SSDT**: * **IMEI SSDT**:
* If you have either a Sandy bridge CPU with 7 series motherboard or Ivy Bridge with 6 series motherboard, you'll need to either use the prebuilt or manually create it. * If you have either a Sandy bridge CPU with 7 series motherboard or Ivy Bridge with 6 series motherboard, you'll need to either use the prebuilt or manually create it.
* **RTC0 RANGE SSDT**:
If you have X99 or X299, you'll need to configure it to your system
For users who don't have all the options available to them in SSDTTime, you can follow the "SSDTs: The long way" section. You can still use SSDTTime for SSDTs it does support. For users who don't have all the options available to them in SSDTTime, you can follow the "SSDTs: The long way" section. You can still use SSDTTime for SSDTs it does support.
@@ -39,7 +39,9 @@ What are all these options?:
* This is the SSDT-PMC, for Intel true 300+ series only, this device is missing from ACPI in recent boards and helps to bring back NVRAM support. * This is the SSDT-PMC, for Intel true 300+ series only, this device is missing from ACPI in recent boards and helps to bring back NVRAM support.
* `6. AWAC - Context-Aware AWAC Disable and RTC Fake` * `6. AWAC - Context-Aware AWAC Disable and RTC Fake`
* This is the SSDT-AWAC/RTC0, its purpose is to fix the system clocks found on newer hardware * This is the SSDT-AWAC/RTC0, its purpose is to fix the system clocks found on newer hardware
* `7. Dump DSDT - Automatically dump the system DSDT` * `7. USB Reset - Reset USB controllers to allow hardware mapping`
* This is SSDT-RHUB, used for resetting USB ports in macOS for Asus's Z490 motherboards
* `8. Dump DSDT - Automatically dump the system DSDT`
* Dumps your DSDT from your firmware * Dumps your DSDT from your firmware

1
ssdt-methods/ssdt-methods.md
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@@ -4,6 +4,7 @@ Creating SSDTs mainly fall into 3 camps:
* [Prebuilt SSDTs](../ssdt-methods/ssdt-prebuilt.md) * [Prebuilt SSDTs](../ssdt-methods/ssdt-prebuilt.md)
* They're universal but don't teach much * They're universal but don't teach much
* For most users, we recommend this as it does not require any compling
* [Automated tools](../ssdt-methods/ssdt-easy.md) * [Automated tools](../ssdt-methods/ssdt-easy.md)
* Mainly seen with SSDTTime, work much better than prebuilts as there's less bloat however doesn't teach you much * Mainly seen with SSDTTime, work much better than prebuilts as there's less bloat however doesn't teach you much
* [Manually creating them](../ssdt-methods/ssdt-long.md) * [Manually creating them](../ssdt-methods/ssdt-long.md)

739
ssdt-methods/ssdt-prebuilt.md
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@@ -1,129 +1,684 @@
# Pre-Built SSDTs # Pre-Built SSDTs
* [Power Management](#power-management) Simply select your hardware type and generation, then download the associated files. Once downloaded, place them in your EFI under EFI/OC/ACPI and head back to [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
* [B550 fix](#b550-fix)
* [Embedded Controllers](#embedded-controllers)
* [Trackpad](#trackpad)
* [Backlight](#backlight)
* [System Clock(AWAC)](#system-clockawac)
* [NVRAM(PMC)](#nvrampmc)
* [USB(RHUB)](#usbrhub)
* [IMEI](#imei)
This is mainly for users who are having troubles either compiling, decompiling or understanding the overall process of ACPI. The main reasons you'd want to avoid is for the following: * [Intel Desktop SSDTs](#intel-desktop-ssdts)
* [Penryn, Lynnfield and Clarkdale](#desktop-penryn-lynnfield-and-clarkdale)
* [Sandy and Ivy Bridge](#desktop-sandy-and-ivy-bridge)
* [Haswell and Broadwell](#desktop-haswell-and-broadwell)
* [Skylake and Kaby Lake](#desktop-skylake-and-kaby-lake)
* [Coffee Lake](#desktop-coffee-lake)
* [Comet Lake](#desktop-comet-lake)
* [Intel Laptop SSDTs](#intel-laptop-ssdts)
* [Clarksfield and Arrandale](#laptop-clarksfield-and-arrandale)
* [Sandy and Ivy Bridge](#laptop-sandy-and-ivy-bridge)
* [Haswell and Broadwell](#laptop-haswell-and-broadwell)
* [Skylake and Kaby Lake](#laptop-skylake-and-kaby-lake)
* [Coffee Lake(8th gen)](#laptop-coffee-lake8th-gen)
* [Coffee and Comet Lake(9th and 10th gen)](#laptop-coffee-and-comet-lake-9th-and-10th-gen)
* [Ice Lake](#laptop-ice-lake)
* [Intel HEDT SSDTs](#intel-hedt-ssdts)
* [Nehalem and Westmere](#nehalem-and-westmere)
* [Sandy and Ivy Bridge-E](#sandy-and-ivy-bridge-e)
* [Haswell and Broadwell-E](#haswell-and-broadwell-e)
* [Skylake and Cascade Lake-X/W](#skylake-and-cascade-lake-x-w)
* [AMD SSDTs](#amd-ssdts)
* [Bulldozer/Jaguar](#amd-bulldozer-jaguar)
* [Zen](#amd-zen)
* Slowing down the boot process ## Intel Desktop SSDTs
* Mainly because these SSDTs have to go through every possible pathing
* At most, this only adds 2 seconds to the boot process, and does not affect macOS itself
* Doesn't always work
* The SSDTs provided can only handle so many situations, and some may in fact not work
* Mainly seen with SSDT-AWAC, as it assumes there is a way the RTC can be easily enabled
* Teaches nothing
* This is the **biggest** issue as you have no real idea on how to troubleshoot or how to make these files down the line
Please refer to [Choosing the SSDTs](/ssdt-platform.md) page for which your system needs. * [Penryn, Lynnfield and Clarkdale](#desktop-penryn-lynnfield-and-clarkdale)
* [Sandy and Ivy Bridge](#desktop-sandy-and-ivy-bridge)
* [Haswell and Broadwell](#desktop-haswell-and-broadwell)
* [Skylake and Kaby Lake](#desktop-skylake-and-kaby-lake)
* [Coffee Lake](#desktop-coffee-lake)
* [Comet Lake](#desktop-comet-lake)
## Power Management ### Desktop Penryn, Lynnfield and Clarkdale
For Haswell and newer: ::: tip SSDTs required
* [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
:::
### Desktop Sandy and Ivy Bridge
::: tip SSDTs required
* [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml)
* [SSDT-IMEI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-IMEI.aml)
* Required for Sandy Bridge CPU with 7 series motherboard
* ie. B75, Q75, Z75, H77, Q77, Z77
* Required Ivy Bridge CPU with 6 series motherboard
* ie. H61, B65, Q65, P67, H67, Q67, Z68
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
SSDT-IMEI
* Used for creating an IMEI device when one is not present in ACPI\
* Required for Sandy Bridge CPU with 7 series motherboard
* ie. B75, Q75, Z75, H77, Q77, Z77
* Required Ivy Bridge CPU with 6 series motherboard
* ie. H61, B65, Q65, P67, H67, Q67, Z68
:::
### Desktop Haswell and Broadwell
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml) * [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
For Ivy Bridge and older, see the [Optimizing Power Management page](https://dortania.github.io/OpenCore-Post-Install/universal/pm.html). This will be done *after* install. AMD CPU users **do not** need any SSDTs for power management.
### B550 and A520 Fix
For AMD B550 and A520 users, you **must** include this SSDT to boot:
* [SSDT-CPUR](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-CPUR.aml)
Note that X570 and older boards do not need this SSDT.
## Embedded Controllers
For desktops:
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* For Skylake and newer and all AMD systems.
* [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml) * [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml)
* For Broadwell and older.
For laptops: Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [SSDT-EC-USBX-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-LAPTOP.aml) * [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
* For Skylake and newer.
* [SSDT-EC-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-LAPTOP.aml)
* For Broadwell and older.
## Trackpad :::
Used for enabling Windows only features in macOS with I2C trackpads, do note that the below patches will more than likely break Windows booting via OpenCore(this issue is mitigated if booting by BIOS instead). We **highly** encourage you to make one yourself to prevent any issues down the line: [Trackpad GPI0](/Laptops/trackpad.md) ::: details In-depth info on the SSDTs
Note that PS2 keyboards and trackpads shouldn't need this SSDT+Patch. SSDT-PLUG:
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml) * Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
* [XOSI-Rename.plist](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/XOSI-Rename.plist) SSDT-EC:
* Note you'll need to add this into your config.plist under `ACPI -> Patch`:
| Comment | String | Change _OSI to XOSI | * Used for disabling your real Embedded controller and creating a fake one for macOS to play with
| :--- | :--- | :--- |
| Enabled | Boolean | YES |
| Count | Number | 0 |
| Limit | Number | 0 |
| Find | Data | 5f4f5349 |
| Replace | Data | 584f5349 |
## Backlight :::
For laptops and all-in-one desktops, fixies brightness control support ### Desktop Skylake and Kaby Lake
* [SSDT-PNLF](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF.aml) ::: tip SSDTs required
* For most users.
* [SSDT-PNLF-CFL](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF-CFL.aml)
* For Coffee Lake and newer.
## System Clock(AWAC)
Mainly needed for newer systems running AWAC based system clocks, mainly relevant for Z390 and newer(Gigabyte and AsRock however did back-port it to Z370 with a BIOS update) * [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
:::
### Desktop Coffee Lake
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml) * [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
The biggest issue with this prebuilt is that we're just guessing you both have an AWAC clock and that it can be turned off, I **highly** encourage you to make one yourself to really know whether you both need this and if it's going to work: [AWAC vs RTC](/Universal/awac.md)
## NVRAM(PMC)
Needed to bring back NVRAM support for Z390 , **DO NOT USE ON Z370 or older or Z490 and newer**
Note: Comet Lake, Ice Lake and newer do not need this.
* [SSDT-PMC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PMC.aml) * [SSDT-PMC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PMC.aml)
Reminder only the following need this SSDT: Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* B360 * [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
* B365
* H310
* H370
* Z390
## USB(RHUB) :::
Needed for 10th gen Asus motherboards, Gigabyte and AsRock motherboards don't need this: ::: details In-depth info on the SSDTs
* [SSDT-RHUB.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RHUB.aml) SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-AWAC:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
SSDT-PMC:
* Used to enable native NVRAM on "true" 300 series motherboards
* ie. B360, B365, H310, H370, Z390
* Note Z370 is not included
:::
### Desktop Comet Lake
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
* [SSDT-RHUB](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RHUB.aml)
* Specifically for Asus's 400 series motherboards, Gigabyte and others do not need SSDT-RHUB
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-AWAC:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
SSDT-RHUB:
* Used to reset USB controllers on Asus's 400 series motherboards due to poor ACPI implementation from the OEM
* Note Gigabyte, MSI, AsRock, etc do not need this SSDT. Only Asus
:::
## IMEI ## Intel Laptop SSDTs
Required when pairing either:
* Sandy Bridge CPU with 7 series motherboard ### Laptop Clarksfield and Arrandale
* ie. B75, Q75, Z75, H77, Q77, Z77
* Ivy Bridge CPU with 6 series motherboard ::: tip SSDTs required
* ie. H61, B65, Q65, P67, H67, Q67, Z68
* [SSDT-EC-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-LAPTOP.aml)
* [SSDT-PNLF](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Sandy and Ivy Bridge
::: tip SSDTs required
* [SSDT-EC-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-LAPTOP.aml)
* [SSDT-IMEI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-IMEI.aml)
* Required for Sandy Bridge CPU with 7 series motherboard
* ie. B75, Q75, Z75, H77, Q77, Z77
* Required Ivy Bridge CPU with 6 series motherboard
* ie. H61, B65, Q65, P67, H67, Q67, Z68
* [SSDT-PNLF](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
SSDT-IMEI
* Used for creating an IMEI device when one is not present in ACPI
* Required for Sandy Bridge CPU with 7 series motherboard
* ie. B75, Q75, Z75, H77, Q77, Z77
* Required Ivy Bridge CPU with 6 series motherboard
* ie. H61, B65, Q65, P67, H67, Q67, Z68
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Haswell and Broadwell
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-LAPTOP.aml)
* [SSDT-PNLF](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Skylake and Kaby Lake
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-LAPTOP.aml)
* [SSDT-PNLF](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Coffee Lake(8th gen)
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-LAPTOP.aml)
* [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
* [SSDT-PNLF-CFL](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF-CFL.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-AWAC:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Coffee and Comet Lake(9th and 10th gen)
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-LAPTOP.aml)
* [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
* [SSDT-PMC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PMC.aml)
* Only for 9th gen laptops, 10th gen can ignore
* [SSDT-PNLF-CFL](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF-CFL.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-AWAC:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
SSDT-PMC:
* Used to enable native NVRAM on "true" 300 series motherboards
* Only for 9th gen laptops
Simply grab the following SSDT: SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
### Laptop Ice Lake
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-LAPTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-LAPTOP.aml)
* [SSDT-AWAC](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-AWAC.aml)
* [SSDT-RHUB](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RHUB.aml)
* [SSDT-PNLF-CFL](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PNLF-CFL.aml)
* [SSDT-XOSI](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-XOSI.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-AWAC:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
SSDT-RHUB:
* Used to reset USB controllers on Ice Lake laptops due to poor OEM ACPI implementation
* Mainly seen on Dell laptops
SSDT-PNLF:
* Used for controlling the backlight on internal displays such as AIOs and laptops
SSDT-XOSI:
* Enables many Windows-only functionality in macOS
* Requires XOSI patch(covered later on)
:::
## Intel HEDT SSDTs
### Nehalem and Westmere
::: tip SSDTs required
* [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
### Sandy and Ivy Bridge-E
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-DESKTOP.aml)
* [SSDT-UNC0](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-UNC0.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
SSDT-UNC0:
* Used to ensure unused or missing uncore bridges are properly disabled, otherwise kernel panic in IOPCIFamily in macOS Big Sur
:::
### Haswell and Broadwell-E
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* [SSDT-RTC0-RANGE-HEDT](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RTC0-RANGE-HEDT.aml)
* [SSDT-UNC0](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-UNC0.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-RTC0-RANGE-HEDT:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
* Added benefit is to resolve early halts in macOS Big Sur's booting due to poor ACPI implementation
SSDT-UNC0:
* Used to ensure unused or missing uncore bridges are properly disabled, otherwise kernel panic in IOPCIFamily in macOS Big Sur
:::
### Skylake and Cascade Lake-X/W
::: tip SSDTs required
* [SSDT-PLUG-DRTNIA](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-PLUG-DRTNIA.aml)
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* [SSDT-RTC0-RANGE-HEDT](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-RTC0-RANGE-HEDT.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-PLUG:
* Used for enabling Apple's XCPM in macOS, allowing for far better CPU power management
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-RTC0-RANGE-HEDT:
* Used to enable the legacy RTC clock in macOS, as the newer AWAC clock is unsupported
* Added benefit is to resolve early halts in macOS Big Sur's booting due to poor ACPI implementation
:::
## AMD SSDTs
### AMD Bulldozer/Jaguar
::: tip SSDTs required
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
:::
### AMD Zen
::: tip SSDTs required
* [SSDT-EC-USBX-DESKTOP](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-EC-USBX-DESKTOP.aml)
* [SSDT-CPUR](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-CPUR.aml)
* Only required for B550, A520 and newer
* X570 and older **DO NOT** need SSDT-CPUR
* No threadripper machines need this either
Once downloaded, place them into your EFI folder under EFI/OC/ACPI and head back to the install guide
* [config.plist Setup](https://dortania.github.io/OpenCore-Install-Guide/config.plist/)
:::
::: details In-depth info on the SSDTs
SSDT-EC-USBX:
* Used for disabling your real Embedded controller and creating a fake one for macOS to play with
* USBX portion is used for injection USB power properties missing on Skylake and newer
SSDT-CPUR:
* Used for fixing CPU definitions in ACPI, as macOS does not properly support the ACPI used in B550 and newer boards
:::
* [SSDT-IMEI.aml](https://github.com/dortania/Getting-Started-With-ACPI/blob/master/extra-files/compiled/SSDT-IMEI.aml)

17
ssdt-platform.md
View File

@@ -4,8 +4,9 @@ Please see the **specific ACPI section of your config.plist**, all SSDTs needed
* [What SSDTs do each platform need](#what-ssdts-do-each-platform-need) * [What SSDTs do each platform need](#what-ssdts-do-each-platform-need)
* [Desktop](#desktop) * [Desktop](#desktop)
* [High End Desktop](#high-end-desktop)
* [Laptop](#laptop) * [Laptop](#laptop)
* [SSDT Creation](#ssdt-creation) * [SSDT Creation](#ssdt-creation)
## Desktop ## Desktop
@@ -26,13 +27,13 @@ Please see the **specific ACPI section of your config.plist**, all SSDTs needed
## High End Desktop ## High End Desktop
| Platforms | **CPU** | **EC** | **AWAC** | | Platforms | **CPU** | **EC** | **RTC** | **PCI** |
| :-------: | :-----: | :----: | :------: | | :-------: | :-----: | :----: | :-----: | :-----: |
| Nehalem and Westmere | N/A | [SSDT-EC](./Universal/ec-fix) | N/A | | Nehalem and Westmere | N/A | [SSDT-EC](./Universal/ec-fix.html) | N/A | N/A |
| Ivy Bridge-E | [SSDT-PLUG](./Universal/plug) | ^^ | ^^ | | Ivy Bridge-E | [SSDT-PLUG](./Universal/plug) | ^^ | ^^ | [SSDT-UNC](./Universal/unc0) |
| Haswell-E | ^^ | [SSDT-EC-USBX](./Universal/ec-fix) | ^^ | | Haswell-E | ^^ | [SSDT-EC-USBX](./Universal/ec-fix) | [SSDT-RTC0-RANGE](./Universal/awac) | ^^ |
| Broadwell-E | ^^ | ^^ | ^^ | | Broadwell-E | ^^ | ^^ | ^^ | ^^ |
| Skylake-X | ^^ | ^^ | [SSDT-AWAC](./Universal/awac) | | Skylake-X | ^^ | ^^ | ^^ | N/A |
## Laptop ## Laptop