Deploy khronokernel/Getting-Started-With-ACPI to github.com/khronokernel/Getting-Started-With-ACPI.git:gh-pages

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@@ -404,14 +404,15 @@
<p>To determine whether you need <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl" target="_blank">SSDT-AWAC</a> or <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a>:</p>
<ul>
<li>open your decompiled DSDT and search for <code>Device (AWAC)</code></li>
<li>If nothing shows then no need to continue and no need for this SSDT as you have now AWAC. Otherwise, continue on!</li>
<li>If nothing shows then no need to continue and no need for this SSDT as you have no AWAC. Otherwise, continue on!</li>
<li>If you get a result then you have an <code>AWAC</code> system clock present, then continue with the next search for <code>STAS ==</code>:</li>
</ul>
<p><img src="https://i.imgur.com/uuUF857.png" alt=""></p>
<p>As you can see we found the <code>STAS ==</code> in our DSDT, this means we&apos;re able to force enable our Legacy RTC. In this case, <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl" target="_blank">SSDT-AWAC</a> will be used As-Is with no modifications required. Just need to compile.</p>
<p>For systems where no <code>STAS</code> shows up <strong>but</strong> you do have <code>AWAC</code>, you can use <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a> though you will need to check thwe naming of LPC in your DSDT</p>
<p>For systems where no <code>STAS</code> shows up <strong>but</strong> you do have <code>AWAC</code>, you can use <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a> though you will need to check the naming of LPC in your DSDT</p>
<p>By default the SSDT uses <code>LPCB</code>, you can check what your system uses by just searching for <code>Name (_ADR, 0x001F0000)</code>. This address is used for Low Pin Count devices(LPC) but the device name can vary between <code>LPCB</code>, <code>LBC</code> or <code>LBC0</code>:</p>
<p><img src="https://cdn.discordapp.com/attachments/456913818467958789/675169950108876852/Screen_Shot_2020-02-06_at_7.43.24_PM.png" alt=""></p>
<h2 id="now-youre-ready-to-compile-the-ssdt"><a href="../Manual/compile.html">Now you&apos;re ready to compile the SSDT!</a></h2>
</section>
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</li>
</ul>
<p><img src="https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png" alt=""></p>
<h2 id="now-youre-ready-to-compile-the-ssdt"><a href="../Manual/compile.html">Now you&apos;re ready to compile the SSDT!</a></h2>
</section>
@@ -439,7 +440,7 @@
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<p>If we then search for instances of <code>CP00</code> we find that it&apos;s ACPI path is <code>SB.SCK0.CP00</code>:</p>
<p><img src="https://i.imgur.com/CtL6Csn.png" alt=""></p>
<p>So for this X299 board, we&apos;d change <code>\_PR.CPU0</code> with <code>\_SB.SCK0.CP00</code> and <code>External (_PR_.CPU0, ProcessorObj)</code> with <code>External (_SB_.SCK0.CP00, ProcessorObj)</code></p>
<h2 id="now-youre-ready-to-compile-the-ssdt"><a href="../Manual/compile.html">Now you&apos;re ready to compile the SSDT!</a></h2>
</section>
@@ -440,7 +441,7 @@
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&quot;AMD Radeon R9 390&quot;
}
</code></pre><p><code>&quot;device-id&quot;</code> will be set to our PCI ID that we found in &quot;Finding a suitable PCI ID&quot; and <code>&quot;model&quot;</code> is mainly cosmetic </p>
<p>Once these 2 are set, we&apos;re ready to compile!</p>
<h2 id="now-youre-ready-to-compile-the-ssdt"><a href="../Manual/compile.html">Now you&apos;re ready to compile the SSDT!</a></h2>
</section>
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