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@@ -370,7 +370,18 @@
|
||||
<section class="normal markdown-section">
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||||
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<h1 id="fixing-system-clocks">Fixing System Clocks</h1>
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<p><strong>For Intel 300 series chipsets only</strong></p>
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<p><strong>For Intel 300 series chipsets and newer</strong>, this also includes X299 refreshes and Icelake laptops. Common machines:</p>
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<ul>
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<li>X299X (10th Gen refresh)</li>
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<li>B360</li>
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<li>B365</li>
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<li>H310</li>
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<li>H370</li>
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<li>Z370 (Gigabtye and AsRock boards with newer BIOS versions)</li>
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<li>Z390</li>
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<li>400 series (Cometlake)</li>
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<li>495 series (Icelake) </li>
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</ul>
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<p>So on newer Intel 300 series motherboards, manufactueres started pushing for a new type of system clock: <strong>AWAC</strong>( <strong>A</strong> <strong>W</strong>eird <strong>A</strong>ss <strong>C</strong>lock). One small problem, macOS doesn't know what the hell an AWAC clock is instead only familiar with the legacy <strong>RTC</strong>(<strong>R</strong>eal <strong>T</strong>ime <strong>C</strong>lock). So we need to figure out how to bring back the old clock, thats where <code>SSDT-AWAC</code> and <code>SSDT-RTC0</code> come in:</p>
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<ul>
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<li><p><a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl" target="_blank">SSDT-AWAC</a></p>
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@@ -391,12 +402,12 @@
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<p>To determine whether you need <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl" target="_blank">SSDT-AWAC</a> or <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a>:</p>
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<ul>
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<li>open your decompiled DSDT and search for <code>Device (AWAC)</code></li>
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<li>If nothing shows then no need to continue and no need for this SSDT as you have no AWAC. Otherwise, continue on!</li>
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<li>If you get a result then you have an <code>AWAC</code> system clock present, then continue with the next search for <code>STAS ==</code>:</li>
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<li>If <strong>nothing shows up</strong> then no need to continue and <strong>no need for this SSDT</strong> as you have no AWAC. <strong>Otherwise, continue on!</strong></li>
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<li>If you get a result then you have an <code>AWAC</code> system clock present, then continue with the <strong>next search for <code>STAS ==</code></strong>:</li>
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</ul>
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<p><img src="https://i.imgur.com/uuUF857.png" alt=""></p>
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<p>As you can see we found the <code>STAS ==</code> in our DSDT, this means we're able to force enable our Legacy RTC. In this case, <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl" target="_blank">SSDT-AWAC</a> will be used As-Is with no modifications required. Just need to compile. Note that <code>STAS</code> may be found in AWAC first instead of RTC like in our example, this is normal.</p>
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<p>For systems where no <code>STAS</code> shows up <strong>but</strong> you do have <code>AWAC</code>, you can use <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a> though you will need to check the naming of LPC in your DSDT</p>
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<p>For systems where <strong>no <code>STAS</code></strong> shows up <strong>but</strong> you do have <code>AWAC</code>, you can use <a href="https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl" target="_blank">SSDT-RTC0</a> though you will need to check the naming of LPC in your DSDT</p>
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<p>By default the SSDT uses <code>LPCB</code>, you can check what your system uses by just searching for <code>Name (_ADR, 0x001F0000)</code>. This address is used for Low Pin Count devices(LPC) but the device name can vary between <code>LPCB</code>, <code>LBC</code> or <code>LBC0</code>:</p>
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<p><img src="https://cdn.discordapp.com/attachments/456913818467958789/675169950108876852/Screen_Shot_2020-02-06_at_7.43.24_PM.png" alt=""></p>
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<h2 id="now-youre-ready-to-compile-the-ssdt"><a href="../Manual/compile.html">Now you're ready to compile the SSDT!</a></h2>
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@@ -370,7 +370,16 @@
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<section class="normal markdown-section">
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<h1 id="fixing-nvram">Fixing NVRAM</h1>
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<p>This SSDT is required for all B360, B365, H310, H370, Z390 motherboards, it specifically brings back NVRAM support and requires very little configuration for the end user.</p>
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<p>This SSDT is required for all "true" 300 series motherboards and newer(Z370 is excluded), it specifically brings back NVRAM support and requires very little configuration for the end user.</p>
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<ul>
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<li>B360</li>
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<li>B365</li>
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<li>H310</li>
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<li>H370</li>
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<li>Z390</li>
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<li>400 series (Cometlake)</li>
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<li>495 series (Icelake) </li>
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</ul>
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<p>By default it uses <code>PCI0.LPCB</code> for the PCI and LowPinCount path. The device names can vary between <code>PC00</code> and <code>PCI0</code> for PCI path and <code>LPCB</code>, <code>LBC</code> and <code>LBC0</code> for LowPinCount path. To see what you have:</p>
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<ul>
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<li>Finding the LowPinCount path: <ul>
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Reference in New Issue
Block a user