More stuff

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khronokernel
2020-02-04 15:58:36 -07:00
parent bfab40bcfe
commit f97440b4e4
14 changed files with 220 additions and 27 deletions

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What the [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will do is force enable the Legacy RTC device in macOS, the reason we want to do this is that macOS currently does not support AWAC as a system clock. In some rare cases, there is no Legacy RTC device to force enable so we'll need to create a fake RTC device for macOS to play with using [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl)
To determine whether you need [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) or [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl), open your decompiled DSDT and search for `Device (AWAC)`. If you get a result then you have an `AWAC` system clock present, **if nothing shows then no need to continue and no need for this SSDT**. Otherwise, continue with the next search for `STAS ==`:
To determine whether you need [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) or [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl):
* open your decompiled DSDT and search for `Device (AWAC)`
* If nothing shows then no need to continue and no need for this SSDT.
* If you get a result then you have an `AWAC` system clock present, then continue with the next search for `STAS ==`:
![](https://i.imgur.com/uuUF857.png)
As you can see we found the `STAS ==` in our DSDT, this means we're able to force enable our Legacy RTC. In this case, [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will be used As-Is with no modifications required. Just need to compile.
For systems where no `STAS` shows up but you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check whether your DSDT uses `LPCB`, `LBC` or `LBC0`.
For systems where no `STAS` shows up **but** you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check whether your DSDT uses `LPCB`, `LBC` or `LBC0`.
By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses
By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses:
![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png)

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# Fixing IRQ Conflicts
So you miss having those fancy hotpatches from Clover like FixIPIC, FixTMR, FixRTC, FixHPET, etc
Well 1 very small problem, figruing out IRQ patching is a massive headache. **I highly recommend you use SSDTTime**. So head over to [SSDT: Easy Way]() on how to make it

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# Fixing NVRAM
**This is required for all B360, B365, H310, H370, Z390 motherboards**
This SSDT is required for all B360, B365, H310, H370, Z390 motherboards, it specifically brings back NVRAM support and requires very little configuration for the end user.
This SSDT brings back NVRAM support and uses the scope `PCI0.LPCB` to check what scope your system has, search your DSDT for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary(quite rarely in reality, almost all consumer intel boards use `LPCB`)
By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses:
![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png)

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Universal/xosi.md Normal file
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# Fixing I2C
No configuration required, just drop the prebuilt file into your EFI: [SSDT-XOSI]()
Do note that this SSDT requires an ACPI patch as well:
Under `ACPI -> Patch`:
| Comment | String | Change _OSI to XOSI |
| :--- | :--- | :--- |
| Enabled | String | YES |
| Count | Number | 0 |
| Limit | Nuber | 0 |
| Find | Data | 5f4f5349 |
| Replace | Data | 584f5349 |