More stuff

Laptops/backlight.md

@@ -0,0 +1,5 @@
+# Fixing Backlight
+
+No configuration required, just drop the prebuilt file into your EFI: [SSDT-PNLF]()
+
+

Laptops/laptop-ec.md

@@ -28,20 +28,7 @@ As you can see from the table below, we'll be renaming our EC listed in the DSDT
 |change ECDV to EC|45434456|45435f5f|
 |change PGEC to EC|50474543|45435f5f|
 
-
+## Inside your config:
-## Clover users:
-
-| Comment | String | Change XXXX to EC |
-| :--- | :--- | :--- |
-| Disabled | Boolean | No |
-| Find | Data | xxxxxxxx |
-| Replace | Data | xxxxxxxx |
-
-![](https://cdn.discordapp.com/attachments/302485086060937219/668662065665409024/Screen_Shot_2020-01-19_at_8.44.00_PM.png)
-
-![](https://cdn.discordapp.com/attachments/456913818467958789/668666485463318558/Screen_Shot_2020-01-19_at_9.01.20_PM.png)
-
-## Opencore users:
 
 | Comment | String | Change XXXX to EC |
 | :--- | :--- | :--- |

Laptops/trackpad.md

@@ -0,0 +1,3 @@
+# Fixing Trackpads
+
+No configuration required, just drop the prebuilt file into your EFI: [SSDT-GPIO]()

README.md

@@ -17,14 +17,115 @@ macOS can be very picky about the devices present in the DSDT and so our job is
 * AWAC system clock.
   * This applies to all 300 series motherboards including Z370 boards, the specific issue is that newer boards ship with AWAC clock enabled. This is a problem because macOS cannot communicate with AWAC clocks, so this requires us to either force on the Legacy RTC clock or if unavailable create a fake one for macOS to play with
 * NVRAM SSDT
-  * True 300 series motherboards(non-Z370) don't declare the FW chip as MMIO in ACPI and so XNU ignores the MMIO region declared by the UEFI memory map. This SSDT brings back NVRAM support and uses the scope `PCI0.LPCB`, so some users may need to adjust
+  * True 300 series motherboards(non-Z370) don't declare the FW chip as MMIO in ACPI and so XNU ignores the MMIO region declared by the UEFI memory map. This SSDT brings back NVRAM support
+* Backlight SSDT
+   * Used for fixing backlight support on laptops
 * GPIO SSDT
    * Used for creating a stub to allow VoodooI2C to connect onto, for laptops only
 * XOSI SSDT
-* Used for rerouting OSI calls to this SSDT, mainly used for tricking our hardware into thinking its booting Windows so we get better trackpad support. For laptops only
+   * Used for rerouting OSI calls to this SSDT, mainly used for tricking our hardware into thinking its booting Windows so we get better trackpad support. For laptops only
 * IRQ SSDT and ACPI patch
-   * Needed for fixing IRQ conflicts within the DSDT, for laptops only
+   * Needed for fixing IRQ conflicts within the DSDT, for laptops mainly. SSDTTime exclusive
 
 ## What SSDTs do each platform need
 
-Please see the **specific ACPI section of your config.plist**, all SSDTs needed are covered there with a breif explainer.
+Please see the **specific ACPI section of your config.plist**, all SSDTs needed are covered there with a breif explainer. But here's a very quick TL;DR:
+
+### Desktop
+
+**Ivy Bridge:**
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+* [CPU-PM](https://github.com/Piker-Alpha/ssdtPRGen.sh)
+
+**Haswell:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+
+**Skylake:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+
+**Kabylake:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+
+**Coffeelake:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+* [SSDT AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl)
+* [SSDT-PMC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PMC.dsl)
+
+
+### High End Desktop
+
+**Haswell-E:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+
+**Broadwell-E:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+
+**Skylake-X:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+
+### Laptop
+
+**Ivy Bridge:**
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+* [CPU-PM](https://github.com/Piker-Alpha/ssdtPRGen.sh)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Haswell:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Broadwell:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Skylake:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Kabylake:**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Coffeelake(8th Gen):**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)
+
+**Coffeelake(9th Gen):**
+* [SSDT-PLUG](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PLUG.dsl)
+* [SSDT-EC-USBX](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-EC-USBX.dsl)
+* [SSDT AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl)
+* [SSDT-PMC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-PMC.dsl)
+* [SSDT-PNLF](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/SSDT-PNLF.dsl)
+* [SSDT-XOSI](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-XOSI.aml)
+* [SSDT-GPIO](https://github.com/hackintosh-guides/vanilla-laptop-guide/tree/master/Misc-files/SSDT-GPIO.aml)
+* [IRQ SSDT](https://github.com/corpnewt/SSDTTime)

SUMMARY.md

@@ -2,7 +2,7 @@
 
 * [Getting Started With ACPI](README.md)
 * [SSDTs: Easy Way](ssdt-easy.md)
-* [SSDTs: Long Way]()
+* [SSDTs: Long Way](ssdt-long.md)
 
 ## Manual
 * [Dumping the DSDT](/Manual/dump.md)
@@ -23,8 +23,7 @@
 * [Plugin type](/Universal/plug.md)
 * [AWAC vs RTC](/Universal/awac.md)
 * [NVRAM PMC](/Universal/nvram.md)
-
+* [XOSI](/Universal/xosi.md)
-
+* [IRQ Fix](/Universal/irq.md)
-## Cleanup
 
 

Universal/awac.md

@@ -2,14 +2,18 @@
 
 What the [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will do is force enable the Legacy RTC device in macOS, the reason we want to do this is that macOS currently does not support AWAC as a system clock. In some rare cases, there is no Legacy RTC device to force enable so we'll need to create a fake RTC device for macOS to play with using [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl)
 
-To determine whether you need [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) or [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl), open your decompiled DSDT and search for `Device (AWAC)`. If you get a result then you have an `AWAC` system clock present, **if nothing shows then no need to continue and no need for this SSDT**. Otherwise, continue with the next search for `STAS ==`:
+To determine whether you need [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) or [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl):
+
+* open your decompiled DSDT and search for `Device (AWAC)`
+* If nothing shows then no need to continue and no need for this SSDT. 
+* If you get a result then you have an `AWAC` system clock present, then continue with the next search for `STAS ==`:
 
 ![](https://i.imgur.com/uuUF857.png)
 
 As you can see we found the `STAS ==` in our DSDT, this means we're able to force enable our Legacy RTC. In this case, [SSDT-AWAC](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-AWAC.dsl) will be used As-Is with no modifications required. Just need to compile.
 
-For systems where no `STAS` shows up but you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check whether your DSDT uses `LPCB`, `LBC` or `LBC0`. 
+For systems where no `STAS` shows up **but** you do have `AWAC`, you can use [SSDT-RTC0](https://github.com/acidanthera/OpenCorePkg/blob/master/Docs/AcpiSamples/SSDT-RTC0.dsl) though you will need to check whether your DSDT uses `LPCB`, `LBC` or `LBC0`. 
 
-By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses
+By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses:
 
 ![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png)

Universal/irq.md

@@ -1 +1,5 @@
 # Fixing IRQ Conflicts
+
+So you miss having those fancy hotpatches from Clover like FixIPIC, FixTMR, FixRTC, FixHPET, etc
+
+Well 1 very small problem, figruing out IRQ patching is a massive headache. **I highly recommend you use SSDTTime**. So head over to [SSDT: Easy Way]() on how to make it

Universal/nvram.md

@@ -1,7 +1,7 @@
 # Fixing NVRAM
 
-**This is required for all B360, B365, H310, H370, Z390 motherboards**
+This SSDT is required for all B360, B365, H310, H370, Z390 motherboards, it specifically brings back NVRAM support and requires very little configuration for the end user.
 
-This SSDT brings back NVRAM support and uses the scope `PCI0.LPCB` to check what scope your system has, search your DSDT for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary(quite rarely in reality, almost all consumer intel boards use `LPCB`)
+By default it uses `LPCB`, you can check by just searching for `Name (_ADR, 0x001F0000)`. This address is used for Low Pin Count devices(LPC) but the device name can vary between `LPCB`, `LBC` or `LBC0`. Just search each one in your config and which ever shows up is the one your system uses:
 
 ![](https://cdn.discordapp.com/attachments/456913818467958789/670148514197667840/Screen_Shot_2020-01-23_at_11.08.30_PM.png)

Universal/xosi.md

@@ -0,0 +1,16 @@
+# Fixing I2C
+
+No configuration required, just drop the prebuilt file into your EFI: [SSDT-XOSI]()
+
+Do note that this SSDT requires an ACPI patch as well:
+
+Under `ACPI -> Patch`:
+
+| Comment | String | Change _OSI to XOSI |
+| :--- | :--- | :--- |
+| Enabled | String | YES |
+| Count | Number | 0 |
+| Limit | Nuber | 0 |
+| Find | Data | 5f4f5349 |
+| Replace | Data | 584f5349 |
+

ssdt-easy.md

@@ -7,6 +7,10 @@ What this tool does is dumps your DSDT from your firmware, and then creates SSDT
 So what **can't** SSDTTime do?:
 
 * **HEDT SSDTs**: The ACPI is odd on these platforms so manual work is required
+* **Laptop EC fix**: This is because you need to use an ACPI rename over an SSDT on laptops
+* **SSDT-PNLF**: No need to configuration required, use prebuilt file [here]()
+* **SSDT-GPIO**: No need to configuration required, use prebuilt file [here]()
+* **SSDT-XOSI**: No need to configuration required, use prebuilt file [here]()
 * **AWAC and RTC0 SSDTs**: 300 series intel boards will also need to figure his out(Z390 systems are most common for requiring this but some gigabyte Z370 do as well)
 * **PMC SSDT**: For fixing 300 series intel NVRAM, a prebuilt for `PCI0.LPCB` can be found here: [SSDT-PMC.aml](https://github.com/khronokernel/Opencore-Vanilla-Desktop-Guide/blob/master/extra-files/SSDT-PMC.aml)
 * **USBX SSDT**: This is included on sample SSDTs but SSDTTime only makes the SSDT-EC part, Skylake and newer users can grab a prebuilt here: [SSDT-USBX.aml](https://github.com/khronokernel/Opencore-Vanilla-Desktop-Guide/blob/master/extra-files/SSDT-USBX.aml)
@@ -46,3 +50,12 @@ Don't forget that SSDTs need to be added to Opencore, eminder that .aml is compl
 * config.plist -> ACPI -> Add
 
 Reminder that Cmd/Crtl+R with ProperTree pointed at your OC folder will add all your SSDTs, kexts and .efi drivers to the config for you. Do not add your DSDT to OpenCore, its already in your firmware
+
+Users of `FixHPET` will also need to merge c_patches.plist into their config.plist
+
+Steps to do this:
+
+* Open both files, 
+* Delete the `ACPI -> Patch` section from config.plist
+* Copy the `ACPI -> Patch` section from patches.plist
+* Paste into where old patches were in config.plist

ssdt-long.md

@@ -0,0 +1,61 @@
+# SSDTs: The easy way
+
+So here we'll be using a super simple tool made by CorpNewt: [SSDTTime](https://github.com/corpnewt/SSDTTime)
+
+What this tool does is dumps your DSDT from your firmware, and then creates SSDTs based off your DSDT. **This must be done on the target machine running either Windows or Linux**
+
+So what **can't** SSDTTime do?:
+
+* **HEDT SSDTs**: The ACPI is odd on these platforms so manual work is required
+* **Laptop EC fix**: This is because you need to use an ACPI rename over an SSDT on laptops
+* **SSDT-PNLF**: Needs to be configured to either `IGPU`, `GFX0` or `PEG0`
+* **SSDT-GPIO**: No need to configuration required, use prebuilt file [here]()
+* **SSDT-XOSI**: No need to configuration required, use prebuilt file [here]()
+* **AWAC and RTC0 SSDTs**: 300 series intel boards will also need to figure his out(Z390 systems are most common for requiring this but some gigabyte Z370 do as well)
+* **PMC SSDT**: For fixing 300 series intel NVRAM, a prebuilt for `PCI0.LPCB` can be found here: [SSDT-PMC.aml](https://github.com/khronokernel/Opencore-Vanilla-Desktop-Guide/blob/master/extra-files/SSDT-PMC.aml)
+* **USBX SSDT**: This is included on sample SSDTs but SSDTTime only makes the SSDT-EC part, Skylake and newer users can grab a prebuilt here: [SSDT-USBX.aml](https://github.com/khronokernel/Opencore-Vanilla-Desktop-Guide/blob/master/extra-files/SSDT-USBX.aml)
+
+For users who don't have all the options avaible to them in SSDTTime, you can follow the "SSDTs: The long way" section. You can still use SSDTTime for SSDTs it support for you.
+
+## Running SSDTTime
+
+Run the `SSDTTime.bat` file as Admin on the target machine and you should see something like this:
+
+![](https://cdn.discordapp.com/attachments/456913818467958789/669260286007705623/unknown.png)
+
+What are all these options?:
+
+* `1. FixHPET    - Patch out IRQ Conflicts`
+   * IRQ patching, mainly needed for X79, X99 and laptop users
+* `2. FakeEC     - OS-aware Fake EC`
+   * This is the SSDT-EC, required for Catalina users
+* `3. PluginType - Sets plugin-type = 1 on CPU0/PR00`
+   * This is the SSDT-PLUG, for Intel only
+* `4. Dump DSDT  - Automatically dump the system DSDT`
+   * Dumps your DSDT from your firmware
+
+
+What we want to do is select option `4. Dump DSDT` first, then select the appropriate option(s) for your system. 
+
+> What about USBX?
+
+For Skylake+ and AMD, you can grab a prebuilt file here: [SSDT-USBX.aml](https://github.com/khronokernel/Opencore-Vanilla-Desktop-Guide/blob/master/extra-files/SSDT-USBX.aml). This file is plug and play and requires no device configuration, **do not use on Haswell and older**.
+
+**Troubleshooting note**: See [General Troubleshooting](/troubleshooting/troubleshooting).md if you're having issues running SSDTTime
+
+## Adding to OpenCore
+
+Don't forget that SSDTs need to be added to Opencore, eminder that .aml is complied, .dsl is code. **Add only the .aml file**:
+* EFI/OC/ACPI
+* config.plist -> ACPI -> Add
+
+Reminder that Cmd/Crtl+R with ProperTree pointed at your OC folder will add all your SSDTs, kexts and .efi drivers to the config for you. Do not add your DSDT to OpenCore, its already in your firmware
+
+Users of `FixHPET` will also need to merge c_patches.plist into their config.plist
+
+Steps to do this:
+
+* Open both files, 
+* Delete the `ACPI -> Patch` section from config.plist
+* Copy the `ACPI -> Patch` section from patches.plist
+* Paste into where old patches were in config.plist